PSEUDO SYNCHRONIZATION SIGNAL GENERATING CIRCUIT FOR DIGITAL VIDEO PROCESSOR

摘要

PROBLEM TO BE SOLVED: To allow a digital video processor to freely adjust a screen display device by easily generating a pseudo synchronizing signal delayed by a desired time from an original synchronizing signal synchronously with a dot clock. SOLUTION: When a horizontal synchronizing signal H-SYNC s applied to a pulse generating circuit 10, the circuit 10 outputs a pulse synchronously with a dot clock CLK. Then a count control section 20 receiving the pulse applies a program data signal at a high level received externally to a down- counter 30 and the counter 30 starts down-counting synchronously with the dot clock CLK. In this case, a zero detection section 40 outputs a pseudo synchronizing signal when the count by the counter 30 is finished. Thus, a pseudo synchronizing signal generating circuit generates a pseudo synchronizing signal delayed by a prescribed time from the original horizontal synchronizing signal synchronously with the dot clock CLK.