发明名称 FREQUENCY ADJUSTABLE CLOCK CONTROL CIRCUIT FOR PHASE LOCKED LOOP REFERENCE MICROPROCESSOR AND ITS ADJUSTMENT METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a microprocessor clock control circuit having the ability of continuous frequency adjustment based on system operation conditions at present. SOLUTION: This circuit is provided with the preparation means of a through rate limited by the phase locked loop of overdamping for continuously searching a new frequency, the selection means 14 of a present target frequency for the microprocessor, the comparison means 16 of the present target frequency and the present set frequency of the microprocessor and the means 18 for adjusting the present set frequency so as to be matched with the present target frequency.</p>
申请公布号 JPH09265332(A) 申请公布日期 1997.10.07
申请号 JP19960070526 申请日期 1996.03.26
申请人 V LSI TECHNOL INC 发明人 DEIBITSUDO AARU EBOI
分类号 G06F1/08;(IPC1-7):G06F1/08 主分类号 G06F1/08
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