Insulated gate field effect transistor and manufacturing method of the same

摘要

A wide high concentration P<+> type region (20) is formed on the surface of an N<-> type epitaxial layer (2) formed on a P type substrate (1) in the vicinity of the edge portion of a cell region in which a transistor device is formed. As a result, holes generated at the outside of the cell region mostly flow through the P<+> type region (20) and reach to an emitter electrode (8). Therefore, the flow amount of the holes does not concentrate on a channel P well (4) for forming a channel region of the transistor device at the cell edge portion, whereby a ruggedness against a latch-up phenomenon can be improved.