LEVEL CONVERTER, OUTPUT CIRCUIT, AND INPUT-OUTPUT CIRCUIT

摘要

PROBLEM TO BE SOLVED: To enable a level converter used for a semiconductor device which operates with a plurality of power supply voltages to stably operate even when a time lag exists between the delivering timing of the power supply voltages. SOLUTION: A level converter is provided with an input buffer circuit 100 and a level converting section 101 equipped with an output holding circuit 102. The buffer circuit 100 outputs a pair of buffer signals X1 and X2 to the level converting section 101 on the basis of a binary input signal A having an amplitude based on a low-voltage power source. The section 101 outputs the binary input signal A after converting the signal A into a binary output signal Y having the amplitude based on a high-voltage power source on the basis of the buffer signals X1 and X2. The output holding circuit 102 outputs the binary output signal Y based on the potential difference between the buffer signals X1 and X2 when the states of the signals X1 and X2 become unstable.