发明名称 |
FREQUENCY DEMULTIPLIER FOR DIGITAL SIGNAL AND FREQUENCY DEMULTIPLYING METHOD FOR DIGITAL SIGNAL |
摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the distortion of a block edge effect and the others and to provide a high processing speed. SOLUTION: A synthesizer 32 and a demultiplier 12 are provided. The synthesizer 32 receives digital video signals including at least the first and second DCT(discrete cosine transformation) blocks of a DCT coefficient, synthesizes the first and second DCT blocks and turns them to one synthetic DCT block provided with a dimension equal to the first and second DCT blocks. The demultiplier 12 generates output digital video signals by converting the synthetic DCT block from a DCT area to a space area.</p> |
申请公布号 |
JPH10336650(A) |
申请公布日期 |
1998.12.18 |
申请号 |
JP19970125938 |
申请日期 |
1997.05.15 |
申请人 |
MITSUBISHI ELECTRIC INF TECHNOL CENTER AMERICA INC |
发明人 |
SUN HUIFANG;J BAO;TOMMY C POON |
分类号 |
H04N11/04;H04N19/46;H04N19/503;H04N19/51;H04N19/60;H04N19/61;H04N19/625;H04N19/70;H04N19/80;H04N19/86;(IPC1-7):H04N7/30 |
主分类号 |
H04N11/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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