发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR SUPPRESSING HOT CARRIER DETERIORATION OF TRANSMISSION GATE
摘要 PROBLEM TO BE SOLVED: To suppress the deterioration of a device characteristic due to a hot carrier effect by connecting a signal source to the gate of a 1st transistor of an inverter that consists of 1st and 2nd n type MOS transistors and to the gate of a complementary p type MOS transistor respectively. SOLUTION: A voltage signal of a negative logic from a signal source 1 is given to a p type MOSFET2 and an n type MOSFET3 through an RC transmission line, it reaches the MOSFET2 faster than the MOSFET3 because of the delay of an inverter 4 and the MOSFET2 first becomes conductive. As a result, the quantity of drain current that flows into the MOSFET3 is suppressed, and the deterioration of a device characteristic due to a hot carrier effect can be suppressed. Also, the dullness of voltage signal which is inputted to a gate of the MOSFET3 is eliminated and the voltage signal can be steep by the inverter 4 that is arranged before an input to the gate of the MOSFET3.
申请公布号 JPH1155096(A) 申请公布日期 1999.02.26
申请号 JP19970207484 申请日期 1997.08.01
申请人 FUJITSU LTD 发明人 ANDOU NARIYOSHI
分类号 G11C7/00;H01L21/822;H01L21/8238;H01L27/04;H01L27/092;H03K17/08;H03K17/687 主分类号 G11C7/00
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