发明名称 CLOCK REPRODUCING CIRCUIT AND DATA TRANSMISSION DEVICE
摘要 PROBLEM TO BE SOLVED: To accurately reproduce clocks by simple circuit constitution by detecting whether an error is an accidental error or an error due to frequence deviation between a generated clock signal and input data, and outputting a switching signal to a clock generation circuit when a frequency deviation error occurs. SOLUTION: When the frequency of a clock signal LCK generated by a VCO 301 is sharply deviated from that of a clock signal TCK used for a transmission part 10A, an error detection circuit 310 detects the deviation as an error. The circuit 310 detects a difference between input data sampled on two points having respectively different phases in the clock signal LCK generated in a clock generation circuit 300 based on input NRZ data as an error signal. Whether the error is an occidental error or an error due to a frequency deviation between the generated clock signal and input data is detected, and in the case of a frequency deviation error, a switching signal S310 is outputted to a differential driver 307 and an in-phase driver 308 in the circuit 300.
申请公布号 JPH1198130(A) 申请公布日期 1999.04.09
申请号 JP19970255406 申请日期 1997.09.19
申请人 SONY CORP 发明人 KIKUCHI HIDEKAZU
分类号 H03L7/087;H03L7/113;H03L7/18;H04L7/00;H04L7/033;H04N7/10 主分类号 H03L7/087
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