发明名称 DATA PROCESSOR
摘要 PROBLEM TO BE SOLVED: To decrease the number of wirings which are needed for supply of instructions given from an instruction issuing part by decoding each output of a shift register to produce a control signal and using this control signal to control an arithmetic circuit. SOLUTION: An control instruction supply circuit 101 issues the control instructions to actuate the arithmetic processing blocks 102 and 106 to 108. In this instruction supply mode, the instruction data which designate the processes of blocks 102 and 106 to 108 are scanned and supplied as a series of data. That is, the instruction data given to the block 108 are supplied to the control circuit of the block 102 in each bit and then the instruction data given to the block 107 are supplied in the same way. Finally, the arithmetic instruction of the block 102 is supplied. As a result, the number of wirings can be minimized for transfer of the instruction data of blocks 102 and 106 to 108. Furthermore, the supply order of instruction data can be freely set and accordingly the wiring area can be reduced.
申请公布号 JPH11110212(A) 申请公布日期 1999.04.23
申请号 JP19970270944 申请日期 1997.10.03
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TANIGUCHI TAKASHI
分类号 G06F7/00;G06F9/30;G06F17/10 主分类号 G06F7/00
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