发明名称 METHOD FOR GENERATING LAYOUT OF LSI PATTERN AND METHOD FOR FORMING LSI PATTERN
摘要 PROBLEM TO BE SOLVED: To quickly generate a mask layout corresponding to a changed exposure condition, even if the exposure condition in lithography process is changed. SOLUTION: An evaluation equation representing a mask dimension L of a pattern width is generated with a continuous function, whose variables are a target design dimension of a pattern in lithography process, width dimensions S1 S2 of a first and second spaces positioned on both sides of the pattern, and an exposure condition in the lithographic process. After a pattern, which is to be an object for dimension control, is extracted from a plurality of patterns constituting an LSI pattern, a line thickness dimension L of a pattern on the mask which realizes a target design dimension is calculated using the evaluation equation a mask for the LSI pattern is generated using the calculated mask dimension L.
申请公布号 JPH11121345(A) 申请公布日期 1999.04.30
申请号 JP19970288772 申请日期 1997.10.21
申请人 MATSUSHITA ELECTRON CORP 发明人 MITSUSAKA AKIO;AIDA AKIHIKO;UMIMOTO HIROYUKI;ODANAKA SHINJI;MATSUOKA KOJI
分类号 G03F1/68;G03F1/70;H01L21/027 主分类号 G03F1/68
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