发明名称 DIGITAL SIGNAL DEMODULATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce a circuit scale by selecting the output signal of an I phase inverse diffuser or a Q phase inverse diffuser at timing corresponding to a count value, generating an orthogonal code at an interval corresponding to the period of the count value and orthogonally and inversely diffusing the output signal selected by a multiplexer by using the orthogonal code. SOLUTION: When inputs I and Q are supplied to the I phase PN inverse diffuser 101 and the Q phase PN inverse diffuser 102, the respective PN inverse diffusers 101 and 102 execute PN inverse diffusion on the inputs by a PN sequence. In an I phase signal and a Q phase signal, which are PN-inversely diffused, the value of the Q phase signal outputted from the Q phase PN inverse diffuser 102 is set to be VQ and the value of the I phase signal outputted from the I phase PN inverse diffuser 101 to be VI. Then, VI and VQ are supplied to the multiplexer 104 from the PN inverse diffusers 101 and 102 and they are supplied to an orthogonal inverse diffuser 105. The count value of a chip clock counter 107 is counted from '0' to 'n' in accordance with the supply of a system clock.
申请公布号 JPH11122211(A) 申请公布日期 1999.04.30
申请号 JP19970278477 申请日期 1997.10.13
申请人 OKI ELECTRIC IND CO LTD 发明人 ARAKI SATORU
分类号 H04J13/00;H04B1/709 主分类号 H04J13/00
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