| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock supplying method and an information processor by which the operating speed of a CPU is accelerated and also its power consumption is reduced inexpensively with a small and simple configuration. SOLUTION: When the operation mode of a central processor (CPU) 1 that has a phase-locked loop(PLL) circuit is switched from a 1st mode to a 2nd mode, the PLL circuit so that the frequency of an external clock supplied to the CPU 1 is gradually increased from a 1st frequency to a 2nd frequency within latency time needed for phase lock. |
