发明名称 |
PLL FOR REPRODUCING STANDARD CLOCK FROM RANDOM TIME INFORMATION |
摘要 |
A PLL is provided for reproducing a standard clock having a constant Jitter band from a random time information. This PLL is composed of a receiving counter 4-1 for counting the standard clock received from the transmitting side; a subtractor 4-3 for comparing between the count value of the receiving counter 4-1 which is read out each time when the receiving counter receives the count value from the transmitting counter; a differential time calculator for calculating a difference between the present count value and the preceding count value of the receiving counter; a first attenuator 4-5 for attenuating the output of the subtractor; a second attenuator 4-6 for further attenuating the output of the first attenuator; an integrator 4-7 for integrating the output of the second attenuator based on the differential time calculated by the differential time calculator; an adder 4-8 for adding the outputs of the adder and the integrator; a converter 4-9 for converting the result of the adder into a voltage signal; and a voltage control oscillator 4-10 for outputting a signal to the receiving counter based on the input of the voltage signal converted by the converter. |
申请公布号 |
CA2256583(A1) |
申请公布日期 |
1999.06.19 |
申请号 |
CA19982256583 |
申请日期 |
1998.12.18 |
申请人 |
NEC CORPORATION |
发明人 |
ROKUGO, YOSHINORI |
分类号 |
H04N5/06;H03L7/08;H03L7/181;H04L7/033;H04N5/04;H04N5/12;H04N19/00;H04N19/70;H04N19/80 |
主分类号 |
H04N5/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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