发明名称 IMPROVED WELL STRUCTURE FOR NONVOLATILE SEMICONDUCTOR MEMORY AND FABRICATION THEREOF
摘要 <p>PROBLEM TO BE SOLVED: To completely solve the problem that a tunnel oxide layer deteriorates through a BTBT current perfectly by an arrangement, wherein the data of a cell transistor is programmed by channel thermal electron injection method and erased by an F-N tunneling system through the bulk region of the cell transistor. SOLUTION: In order to program the data of a cell transistor through channel thermal electron-implantation system and to erase by an F-N tunneling system through the channel or bulk region, cell transistors M1, M2 forming an NOR- type cell array structure are located in the cell region. At the time of programming the cell transistor, the word line and the bit line are applied voltages of about 10 V and 6 V, respectively. Consequently, thermal electrons generated together with a current upon turning the cell transistor on are injected into a floating gate, and the cell transistor has a threshold voltage of about 7 V upon finishing programming.</p>
申请公布号 JPH11191616(A) 申请公布日期 1999.07.13
申请号 JP19980272085 申请日期 1998.09.25
申请人 SAMSUNG ELECTRON CO LTD 发明人 RI TOKEI;KIM KEON-SOO
分类号 H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L27/115;H01L21/824 主分类号 H01L21/8247
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