| 摘要 |
PROBLEM TO BE SOLVED: To provide a frame phase synchronizing circuit by which a slip due to the phase fluctuation of an input frame is prevented from occurring and synchronizing data with higher quality is transmitted. SOLUTION: A phase comparator 1 compares the phase of an input clock with that of the output of a frequency divider 3 and outputs a phase difference signal to a frame phase difference control circuit 5. A VCO 2 supplies the clock signal of a frequency which is proportionate to the voltage of a VCO control signal being the output of the frame phase difference control circuit 5 respectively to a clock output terminal 13, an output frame generating counter 4 and the frequency divider 3 as an output clock. The frame phase difference control circuit 5 is operated so as to monitor whether the difference of the phase of the output frame against the phase of the input frame is within a previously stipulated range or not, to output the output of the phase comparator 1 to the VCO 2 as it is when it is within the range and to output the VCO control voltage in the direction for reducing the frame phase difference to the VCO 2 when it exceeds the range. |
