| 摘要 |
PROBLEM TO BE SOLVED: To make it easy to specify the cause of a discrepancy by calculating what rate the simulation result of a fail pattern matches with a reference circuit at and finding a logic element which has a high rate as a candidate for the cause of the discrepancy. SOLUTION: A discrepancy cause candidate detecting means 6 generates a FAIL pattern, by which a discrepancy between a comparison object circuit 1 degenerated by a circuit degenerating means 5 and the reference circuit 2 can be detected, by a FAIL pattern generating means. Logic simulation is performed by inputting the FAIL pattern having the logic of a logic element and an input terminal of the comparison object circuit 1 generated by an output logic inverting means of the logic element, and the simulation result is compared between the comparison object circuit 1 which is thus degenerated and inverted in logic and the reference circuit 2. Then, a PASS rate calculating means calculates what rate the simulation result is matched with among generated FAIL patterns at. Then, a discrepancy cause candidate output means 7 outputs the name of a logic element having a high matching rate of the simulation result.
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