CMOS INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To obtain a CMOS integrated circuit provided with a latch-up generating circuit block with which latch-up can be detected reliably without requiring a complicated process. SOLUTION: A latch-up generating circuit block 101, where latch-up endurance strength is lower than each circuit block such as the low voltage circuit block 2 mounted inside a CMOS integrated circuit, a high voltage logic circuit block 3 and an output driver 4, etc., is provided in a dielectrically isolated manner. The latch-up detection circuit 102, which is connected to an external output terminal or an internal circuit, and a latch-up generating circuit block 101 are electrically connected.