发明名称 CLOCK CONTROL CIRCUIT FOR TIMER REGISTER
摘要 <p>PROBLEM TO BE SOLVED: To provide a driving circuit for a timer register capable of executing similar operation before and after changing a bus clock without correcting a program even when the bus clock is changed. SOLUTION: The clock control circuit is constituted of a timer register for executing counting operation at a prescribed period, a control register 1 for setting up the counting period of the register 3 and outputting a set signal for setting up the counting period and a PLL circuit 2 for inputting a bus clock and generating a clock signal by dividing or multiplaying the bus clock on the basis of the set signal outputted from the register 1. The register 3 executes counting operation at the counting period synchronized with the clock signal outputted from the PLL circuit 2.</p>
申请公布号 JP2000305814(A) 申请公布日期 2000.11.02
申请号 JP19990117081 申请日期 1999.04.23
申请人 NEC CORP 发明人 TAKAZAWA KAZUYOSHI
分类号 G06F11/30;G06F1/14;(IPC1-7):G06F11/30 主分类号 G06F11/30
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