Lower page read for multi-level cell memory

摘要

An electronic memory or controller may use a first type of read command, addressed to a first page of memory of an electronic memory that includes information to indicate that a second page of memory of the electronic memory has not been programmed and a second type of read command, addressed to the first page of memory, that includes information to indicate that the second page of memory has been programmed. The first page of memory may include a lower page of a multi-level cell (MLC), and the second page of memory may include an upper page of the same MLC. The second page of memory is enabled during a period of time that the first type of read command is used.

主权项

1. An apparatus comprising:
a memory cell enabled to store multiple bits of data in the memory cell; a first page of memory comprising a lower page of the memory cell; a second page of memory comprising an upper page of the memory cell; and circuitry, coupled to the memory cell, to cause one or more accesses to the memory cell responsive to a read request addressed to the first memory page or the second memory page, the circuitry capable to:
determine whether the second page of memory has been programmed;cause a single access of the memory cell via use of a lower page reference voltage if the second page has not been programmed or cause use of an upper page reference voltage if the second page has been programmed; andsense a state of the lower page of the memory cell, based, at least in part, on conductivity of the memory cell during the single access, wherein the circuitry, in response to a read request of the second page of memory, is further capable to:
cause a first access of the memory cell via sue of a middle upper page reference voltage;cause a second access of the memory cell via use of a first upper page reference voltage if the memory cell was conductive during the first access or via use of a third upper page reference voltage if the memory cell was not conductive during the first access; andsense a state of the upper page of the memory cell, based, at least in part, on conductivity of the memory cell during the second access.