发明名称 PLL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To eliminate the change of the charging/discharging current that occurs when the frequency is pulled in and to shorten the frequency pull-in time by providing a drive stopping circuit to stop the driving of a constant current source circuit that is required for pulling in a phase in a frequency pull-in mode. SOLUTION: A drive stopping circuit 7 is provided between a phase comparator 1 and a constant current source circuit 2. The circuit 7 functions to cut the output signals of the comparator 1 (drive signals of the circuit 2) P1 and P2, not to output them to the circuit 2 and accordingly to stop the driving of the circuit 2 as long as a drive signal F1 or F2 of a constant current source circuit 4 is outputted from a frequency comparator 3. When both signals F1 and F2 are not outputted from the comparator 3, the signals P1 and P2 of the comparator 3 are transmitted and outputted to the circuit 2.
申请公布号 JP2000349630(A) 申请公布日期 2000.12.15
申请号 JP19990162256 申请日期 1999.06.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 FUJIMORI YOSHIHISA
分类号 H03L7/113;H03L7/087 主分类号 H03L7/113
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