发明名称 FLIP-FLOP CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a flip-flop(FF), circuit which can be constituted as a high- density semiconductor integrated circuit(IC) and operates relatively fast with a low power consumption. SOLUTION: Flip-flop circuits FF1 to FF6 are constituted by arbitrarily combining and cascading a couple of latch circuits L1 and L2. The latch circuits L1 and L2 respectively an input-stage Push-Pull circuit PP, composed of a hold circuit HD as an output-stage CVSL. The input stage of the larch circuit L1 is composed of two couples of series-parallel connected nMOSTs 2 to 5 which input input data DP and DN respectively and a couple of nMOSTs 1 and 6, which are connected to both sides of the series-parallel circuit and input a clock CP. Furthermore, the output-stage hold circuit HD is composed of a CVSL circuit, consisting of two couples of nMOSTs 7 to 10 and a couple of pMOSTs 12 and 13 and an nMOST 11 which inputs a clock CN.</p>
申请公布号 JP2001217686(A) 申请公布日期 2001.08.10
申请号 JP20000027539 申请日期 2000.02.04
申请人 NEC CORP 发明人 HOTTA TOSHIMI
分类号 H03K3/3562;H03K3/037;H03K3/356;(IPC1-7):H03K3/356 主分类号 H03K3/3562
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