发明名称 LOW-REACTANCE POWER CIRCUIT MOUNTING STRUCTURE
摘要 <p>PROBLEM TO BE SOLVED: To provide a mounting structure of a power electronics circuit which realizes suppression of a parasitic reactance component in a current circuit and efficient radiation of heat in a semiconductor element. SOLUTION: Forward wiring path from a power supply to a semiconductor element and a return path thereto are made of flat plate-like wiring conductors, the plate conductors are positioned adjacent to each other, and the flat semiconductor element is sandwiched by the plate conductors. Electrodes on front and rear surfaces of the semiconductor element are connected to the plate conductors to form a wiring for application of a large current. At the same time, a surface area of a wiring loop of the forward and return paths is minimized to minimize a parasitic reactance in a large current circuit and also a trouble caused thereby.</p>
申请公布号 JP2001217389(A) 申请公布日期 2001.08.10
申请号 JP20000027214 申请日期 2000.01.31
申请人 HITACHI LTD;HITACHI CAR ENG CO LTD 发明人 YOSHIZAKI ATSUHIRO;YAMAMURA HIROHISA;MASUNO KEIICHI;MOKUYA KINJI;SHIMIZU IZUMI
分类号 H01L25/07;H01L25/18;(IPC1-7):H01L25/07 主分类号 H01L25/07
代理机构 代理人
主权项
地址