发明名称 PLL DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a PLL device which shortens a lock-up time, reduces power consumption and can be easily made by using LSI. SOLUTION: This device is provided with a generating means 2 for generating the plural reference signals of different phases, a variable frequency divider 17 for dividing the frequency of an output signal from a voltage controlled oscillator 16, a distributing means for distributing the output of the variable frequency divider and phase comparators 7-10 for comparing the phases of respective feedback signals outputted by the variable frequency divider 17 and the distributing means 18 with the phases of respective reference signals and outputting plural phase comparing signals.
申请公布号 JP2001237697(A) 申请公布日期 2001.08.31
申请号 JP20000044812 申请日期 2000.02.22
申请人 SANYO ELECTRIC CO LTD;TOTTORI SANYO ELECTRIC CO LTD 发明人 WASHIMI IKUAKI
分类号 H03L7/10;H03L7/087;H03L7/18 主分类号 H03L7/10
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