发明名称 ELECTRONIC SYSTEM WITH STORAGE MANAGEMENT MECHANISM AND METHOD OF OPERATION THEREOF
摘要 An electronic system includes: a key value storage device, configured to transfer user data, including: a non-volatile memory array, an interface circuit, coupled to the non-volatile memory array, configured to receive a key value transfer command, a volatile memory, coupled to the interface circuit and the non-volatile memory array, configured to transfer the user data with the interface circuit or the non-volatile memory array, and a device processor, coupled to the interface circuit, configured to manage the non-volatile memory array, the volatile memory, and the interface circuit by a key value index tree to access the user data; and wherein: the interface circuit, connected to a device coupling structure, configured to receive the key value transfer command; and the device processor is configured to address the non-volatile memory array, the volatile memory, or both concurrently based on a key value transfer.
申请公布号 US2016299688(A1) 申请公布日期 2016.10.13
申请号 US201514926674 申请日期 2015.10.29
申请人 Samsung Electronics Co., Ltd. 发明人 Devendrappa Sushma;Liu James;Choi Changho;Xiling Sun
分类号 G06F3/06;G06F12/02 主分类号 G06F3/06
代理机构 代理人
主权项 1. An electronic system comprising: a key value storage device, configured to transfer user data, the key value storage device including: a non-volatile memory array,an interface circuit, coupled to the non-volatile memory array, configured to receive a key value transfer command,a volatile memory, coupled to the interface circuit and the non-volatile memory array, configured to transfer the user data with the interface circuit or the non-volatile memory array, anda device processor, coupled to the interface circuit, configured to manage the non-volatile memory array, the volatile memory, and the interface circuit by a key value index tree to access the user data; and wherein: the interface circuit, connected to a device coupling structure, is configured to receive the key value transfer command; and the device processor is configured to address the non-volatile memory array, the volatile memory, or both concurrently based on a key value transfer.
地址 Suwon-si KR