HIGH-SPEED, ADAPTIVE IDDQ MEASUREMENT

摘要

The invention facilitates measurement of IDDQ values which characterize a test device. A current mirror "mirrors" the current flowing from a power supply through the test device, such that the same current flows through a second current path coupling the power supply to an integrator formed by a transistor connected across a capacitor. Application of a first logic signal to the transistor turns the transistor on, causing current flowing in the second current path to bypass the capacitor, thereby discharging the capacitor. Application of a second logic signal to the transistor turns the transistor off, causing current flowing in the second current path to flow through and charge the capacitor. The rise time of the voltage produced across the charg- ing capacitor is proportional to the IDDQ current value which charac- terizes the test device. The invention further facilitates signature analysis of a test device for defects. A plurality of IDDQ reference values are derived, each value representing quiescent state operation of a defect-free copy of the test device. A corresponding IDDQ test value is derived for each IDDQ reference value. Each test value represents quiescent state operation of the test device after application thereto of the test vector which produced the corresponding reference value. The reference values are compared to their corresponding test values and a plurality of scaling factors are derived. Each scaling factor represents a proportionality between one of the reference values and the corresponding test value. The test device is declared to be non-defective if the scaling factors are equal to one another within an error range which is predefined with respect to the respective test values. Otherwise, the test device is declared to be defective.