| 摘要 |
A semiconductor memory device having a boosted voltage stabilization circuit includes a plurality of memory cell array blocks sharing a predetermined circuit that is operable to use a boosted voltage higher than a power supply voltage. The device also includes a voltage stabilization circuit comprising an additional load for being charged with the boosted voltage when a memory cell array block at an edge of the cell array is selected. Accordingly, the boosted voltage stabilization circuit enables the semiconductor memory device to use a uniform single boosted voltage level regardless of the location of the selected cell array block, thereby preventing the reduction in the life span of the device or the deterioration in the operating characteristics of the device that is normally caused by excessive increases in the boosted voltage level.
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