发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING TEST FACILITATION CIRCUIT FOR FUNCTIONAL BLOCKS INTELLECTUAL PROPERTIES AND AUTOMATIC INSERTING
摘要 PURPOSE: Semiconductor integrated circuit including a test facilitation circuit for functional blocks intellectual properties and automatic inserting is provided to realize a semiconductor integrated circuit in which an effective, high-quality test on the functional blocks (IPs) provided inside the SOC having few outer terminals is achieved and an automatic insertion method of the same test facilitation circuit. CONSTITUTION: The device includes a selection circuit which selects any one of plural inputs; a bi-directional selection circuit which exchanges data bi-directionally; the functional block including an input terminal connected to an output terminal of other functional block and an input terminal of the semiconductor integrated circuit through the selection circuit, and a bi-directional terminal connected to the bi-directional terminal of the other functional block and a bi-directional terminal of the semiconductor integrated circuit through the bi-directional selection circuit; and a test result storage circuit which functions as a test facilitation circuit such that it is connected to an output terminal of the functional block, receives test results of plural bits (n) in parallel from the functional block, signature-compresses the test results, and outputs the signature-compressed data from an output terminal of the semiconductor integrated circuit in the unit of m
申请公布号 KR20020024526(A) 申请公布日期 2002.03.30
申请号 KR20010048980 申请日期 2001.08.14
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NOZUYAMA YASUYUKI
分类号 G01R31/28;G01R31/3185;G06F17/50;G11C29/02;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 主分类号 G01R31/28
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