发明名称 Integrated circuit structure including three-dimensional memory array
摘要 An integrated circuit device includes a three-dimensional memory array and array terminal circuitry for providing to selected memory cells of the array a write voltage different from a read voltage. Neither voltage is necessarily equal to a VDD power supply voltage supplied to the integrated circuit. The write voltage, particularly if greater than VDD, may be generated by an on-chip voltage generator, such as a charge pump, which may require an undesirably large amount of die area, particularly relative to a higher bit density three-dimensional memory array formed entirely in layers above a semiconductor substrate. In several preferred embodiments, the area directly beneath a memory array is advantageously utilized to layout at least some of the write voltage generator, thus locating the generator near the selected memory cells during a write operation.
申请公布号 US6385074(B1) 申请公布日期 2002.05.07
申请号 US20000748816 申请日期 2000.12.22
申请人 MATRIX SEMICONDUCTOR, INC. 发明人 JOHNSON MARK G.;LEE THOMAS H.;SUBRAMANIAN VIVEK;FARMWALD PAUL MICHAEL;CLEEVES JAMES M.
分类号 G11C11/56;G11C17/14;G11C17/16;H01L27/102;(IPC1-7):G11C17/00 主分类号 G11C11/56
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