发明名称 Method of forming interlevel dielectric layer of semiconductor device
摘要 A method of forming an interlevel dielectric layer of a semiconductor device includes filling the gap between conductive lines without the generation of voids or cracks. In the method of forming the interlevel dielectric layer of the semiconductor device, a conductive line is formed on a semiconductor substrate. A polysilazane-family SOG layer is deposited on the semiconductor substrate on which the conductive line is formed. The polysilazane-family SOG layer is baked and etched back until the upper part of the conductive line is exposed using a C-F-family gas having a high C to F ratio, resulting in high etch selectivity ratio of the SOG layer to a silicon nitride layer. A silicon oxide layer, serving as an interlevel dielectric layer, is formed by thermally treating the polysilazane-family SOG layer remaining after the etch back process.
申请公布号 US2002064936(A1) 申请公布日期 2002.05.30
申请号 US20010885091 申请日期 2001.06.21
申请人 PARK WAN-JAE;MIN GYUNG-JIN;JEON JEONG-SIC 发明人 PARK WAN-JAE;MIN GYUNG-JIN;JEON JEONG-SIC
分类号 H01L21/316;H01L21/302;H01L21/31;H01L21/311;H01L21/312;H01L21/314;H01L21/4763;H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/316
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