发明名称 MEMORY CONTROLLER, FLASH MEMORY SYSTEM WITH MEMORY CONTROLLER, AND CONTROL METHOD FOR FLASH MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a memory controller capable of recognizing right corresponding relationship between a logic address and a physical address. SOLUTION: This memory controller is provided with a first means generating additional information corresponding to the logic block address responding to the demand from a host computer to write user data and a second means writing the logic block address and the additional information on prescribed multiple pages without writing the logic block address and the additional information on pages other than pages prescribed by a page address and the sequential, prescribed and multiple pages including the top page.
申请公布号 JP2002196977(A) 申请公布日期 2002.07.12
申请号 JP20000397925 申请日期 2000.12.27
申请人 TDK CORP 发明人 TERASAKI YUKIO;MUKODA NAOKI;KIDA KENZO
分类号 G06F12/16;G06F12/00;G06F12/02 主分类号 G06F12/16
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