| 摘要 |
PROBLEM TO BE SOLVED: To provide a data arithmetic processor which can improve arithmetic precision by suppressing decrease in the arithmetic precision due to canceling in a block floating system. SOLUTION: When effective data are present in a guard bit area of arithmetic data from a product sum computing element 12, a difference scale factor detector 50a calculates the number of bits of the effective data in the guard bit area and outputs it as a scale factor with negative value to a 1st shifter 24, and when no effective data is present in the guard bit area, on the other hand, the number of bits of redundant data in the data bit area is calculated and outputted as a scale factor with positive value to the 1st shifter 24. The 1st shifter 24 shifts the arithmetic data to the right by a shift quantity corresponding to its absolute value when supplied with the scale factor with negative value and shifts the arithmetic data to the left by the shift quantity corresponding to the absolute value when supplied with the scale factor with positive value. |
