| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock extraction circuit which blocks small pulses from appearing in the prior art, due to a transmit side clock being delayed from a receive side clock, thereby increasing the resistance with respect to the difference between transmission and reception frequencies. SOLUTION: The clock extractor circuit has an oscillator circuit using a three-input logic circuit, instead of a two-input logic circuit and inputs received data to the oscillator circuit after delaying the data by a fixed time. |
