Circuits and Methods for Limiting Current In Random Access Memory Cells

摘要

Circuits and methods for limiting cell current or throttling write operation, or both, in resistive random access memory (RRAM or ReRAM) cells are provided. An RRAM cell can include a select transistor and a programmable resistor that can change between a relatively high resistance and a relatively low resistance. The present circuits and methods can reduce or inhibit excess current from being applied to the programmable resistor, which potentially can regulate the resistance of the programmable resistor so as to reduce or inhibit decreases in the resistance of that resistor below the relatively low resistance. Such regulation potentially can improve reliability of the RRAM cell. Additionally, or alternatively, the present circuits and methods can throttle a write operation in an RRAM cell, e.g., can disable current flow through the RRAM cell based on the programmable resistor reaching a pre-defined target resistance, such as the relatively low resistance.

主权项

1. A memory cell, comprising:
a first low dropout regulator (LDO) configured to output a bit line voltage VBL; a resistive random access memory (RRAM) cell coupled to the first LDO, the RRAM cell comprising a first select transistor and a programmable resistor, a gate of the first select transistor being coupled to a word line and receiving a word line voltage VWL, the RRAM cell receiving as input the bit line voltage VBL, from the first LDO, the programmable resistor being configured to change between a relatively high resistance and a relatively low resistance responsive to changes in a cell current ICELL through the RRAM cell based upon values of VBL, and VWL; and a current limiter comprising a PMOS transistor, a gate of the PMOS transistor receiving a limit voltage Vplim, a drain of the PMOS transistor being coupled to the first LDO.