| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor memory in which data read out from memory cells can be outputted stably at a high rate without requiring an extra circuit. SOLUTION: Two complementary read bit lines for reading out data from respective memory cells MC1 -MCN are arranged on the opposite sides in the arranging direction of the memory cells MC1 -MCN. The read bit lines RB and /RB intersect substantially in the center of arrangement of the memory cells MC1 -MCN and lateral arrangement thereof is transposed. In correspondence with the transposition, upper half memories MC1 -MCN/2 out of the memory cells MC1 -MCN are connected with the read bit lines RB and /RB under a state where a connecting line 3 is intersecting the connecting line 4.</p> |
