发明名称 Method and apparatus for arbitrating a memory bus
摘要 A method and apparatus comprising initializing a circuit, said circuit having at least one memory element coupled to a memory bus, on a host system (e.g., a computer system). Monitoring signals on the memory bus of the host system, detecting a first sequence of signals, and switching control of the at least one memory element to the circuit coupled to the memory bus on the host system. The method and apparatus further comprises detecting a second sequence of signals, and switching control of the at least one memory element to the host system.
申请公布号 US2003061453(A1) 申请公布日期 2003.03.27
申请号 US20010965387 申请日期 2001.09.27
申请人 COSKY JASON E.;MORELLI JOHN A. 发明人 COSKY JASON E.;MORELLI JOHN A.
分类号 G06F13/42;(IPC1-7):G06F13/00 主分类号 G06F13/42
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