发明名称 Methods and circuitry for reducing intermodulation in integrated transceivers
摘要 Methods and circuitry reduce adverse impacts of intermodulation and optimize performance of integrated circuits that include two or more oscillator circuits on the same chip. In one embodiment, intermodulation between voltage-controlled oscillators (VCOs)in the receiver and transmitter paths of a transceiver is reduced by adjusting relative power of the VCOs and/or bandwidths of the phase-locked loops (PLLs). The invention measures the injection lock frequency range of the VCOs based on which transmitter and receiver VCO power and loop bandwidths are adjusted.
申请公布号 US2003078022(A1) 申请公布日期 2003.04.24
申请号 US20010037897 申请日期 2001.10.22
申请人 BROADCOM CORPORATION 发明人 CAI YIJUN
分类号 H03L1/00;H03L7/07;H04B1/10;(IPC1-7):H04B1/06 主分类号 H03L1/00
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