发明名称 MANUFACTURING METHOD FOR MULTI-CHIP RESISTOR
摘要 <p>PROBLEM TO BE SOLVED: To provide a method for manufacturing a multi-chip resistor in which no defective resistance value due to solder erosion is generated and no defective conduction due to solder wet failure is generated when the multi-chip resistor is mounted by soldering. SOLUTION: Before a process wherein a plating 22 is applied to a through hole electrode 12 and an upper surface electrode 11 formed in a plurality of recessed parts in a substrate piece that is made by secondary division 18, polishing 19 using emery powder, etc., and cleaning 20 are performed. By this, scattered low molecular resin, which is generated at curing of a second protective layer 16 and sticks to the through hole electrode 12 formed in a plurality of through holes, is removed.</p>
申请公布号 JP2003133109(A) 申请公布日期 2003.05.09
申请号 JP20010328824 申请日期 2001.10.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAITOU ISAMI;TSUDA SEIJI
分类号 H01C17/06;(IPC1-7):H01C17/06 主分类号 H01C17/06
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