发明名称 Four-rail NCL incrementor/decrementor
摘要 A four-rail incrementor/decrementor circuit is presented. The circuit is capable of operating in an asynchronous (i.e., lacking a clock signal) environment. The basic circuit can be cascaded to build incrementor/decrementors that can handle numbers of arbitrarily large size. The circuit can also achieve a 50% power savings over two-rail versions.
申请公布号 US2003097392(A1) 申请公布日期 2003.05.22
申请号 US20010989107 申请日期 2001.11.21
申请人 MASTELLER STEVEN R. 发明人 MASTELLER STEVEN R.
分类号 G06F7/50;G06F7/505;(IPC1-7):G06F7/50 主分类号 G06F7/50
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