发明名称 Systematic memory location selection in ethernet switches
摘要 A switch and a process of operating a switch are described where a received data frame is stored into memory in a systematic way. In other words, a location is selected in the memory to store the received data frame using a non-random method. By storing the received data frame in this way, switches that employ this system and method increase bandwidth by avoiding delays incurred in randomly guessing at vacant spaces in the memory. The received data frame is stored until a port that is to transmit the received data frame is available. Throughput is further improved by allowing the received data frames to be stored in either contiguous or non-contiguous memory locations.
申请公布号 US2003110305(A1) 申请公布日期 2003.06.12
申请号 US20010014007 申请日期 2001.12.10
申请人 SAXENA RAHUL 发明人 SAXENA RAHUL
分类号 H04L12/56;(IPC1-7):G06F15/16;G06F15/173 主分类号 H04L12/56
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