| 摘要 |
The present invention provides a baseband RF clock synthesizer having particular use in a BLUETOOTH piconet device, which has the capability of providing simple and accurate calibration of modulation path gain (KMOD) by introducing a dual-loop phase locked loop (PLL) in the RF clock signal synthesizer. The disclosed technique and apparatus controls the maximum frequency deviation by the difference of two locked frequencies, one frequency in each path of the dual-path PLL. Once the PLL is locked within some frequency error, the present technique and apparatus calibrates for the deviation of amplitude of the modulation due to the modulation path. Accordingly, modulation gain (KMOD) calibration is provided by adding an auxiliary loop to a PLL in an RF frequency synthesizer.
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