发明名称 METHOD FOR DESIGNING ELECTRONIC APPARATUS AND METHOD FOR MANUFACTURING THE SAME
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method for designing and a method for manufacturing preventing the hollow of erosion generated by the coarseness and minuteness in an area with different polishing speed to obtain a polished surface with good flatness, when forming STI structure and wiring structure using a CMP method. <P>SOLUTION: The methods equally divide a layout area into a small area to calculate an area ratio every small area thereof divided and then judge whether the area ratio is within a first prescribed range. Then, when the small area is out of the range, they arrange a dummy area or divide a pattern to make it within the range. After judgment on all small areas, they divide the layout area into a large area with different size from the small area to calculate the area ratio and judge whether the area ratio is within a second prescribed range. When the large area is out of the range, they make it within the range in the same way as the above. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2003347406(A) 申请公布日期 2003.12.05
申请号 JP20020158276 申请日期 2002.05.30
申请人 FUJITSU LTD 发明人 ITANI NAOKI
分类号 G11B5/31;G06F9/45;G06F17/50;H01L21/3105;H01L21/76;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L21/82 主分类号 G11B5/31
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