发明名称 | Etch stop region based fabrication of bonded semiconductor structures | ||
摘要 | Bonded semiconductor device structures and device structure fabrication processes to obviate the need for SOI wafers in many device fabrication applications are disclosed. In some examples, an etch stop layer is formed in situ during fabrication of an active device structure on a bulk semiconductor wafer. The etch stop layer enables the active device structure to be separated from the bulk semiconductor wafer in a layer transfer process in which the active device structure is bonded to a handle wafer. These examples enable the production of high-performance and low-power semiconductor devices (e.g., fully or partially depleted channel transistors) while avoiding the high costs of SOI wafers. In some examples, the gate masks the etch stop layer implant in a self-aligned process to create a fully depleted channel under the gate and deeper implants in the source and drain regions without requiring a separate masking layer. | ||
申请公布号 | US9466729(B1) | 申请公布日期 | 2016.10.11 |
申请号 | US201514707367 | 申请日期 | 2015.05.08 |
申请人 | Qualcomm Incorporated | 发明人 | Fanelli Stephen A. |
分类号 | H01L21/311;H01L29/786;H01L29/66;H01L21/306 | 主分类号 | H01L21/311 |
代理机构 | Haynes and Boone, LLP | 代理人 | Haynes and Boone, LLP |
主权项 | 1. A method, comprising: building a transistor in relation to a top portion of a bulk semiconductor wafer comprising a substrate, the top portion including a semiconductor surface, wherein the building comprises constructing a gate of the transistor on the semiconductor surface, forming source and drain regions of the transistor, and annealing the source and drain regions of the transistor; forming an insulator on the transistor; after the gate is constructed but before the insulator is formed, implanting an etch stop dopant in the top portion of the semiconductor wafer to form an etch stop region below the transistor; after the insulator is formed, bonding a top surface of a handle wafer to the semiconductor wafer; and after the bonding, removing a bottom substrate portion of the semiconductor wafer, wherein the removing comprises etching the bottom substrate portion of the semiconductor wafer to the etch stop region to form a depression that extends between the source and drain regions. | ||
地址 | San Diego CA US |