Cointegration of directed self assembly and sidewall image transfer patterning for sublithographic patterning with improved design flexibility

摘要

After forming transfer layer portions over a portion of a dielectric cap layer overlying a first portion of a substrate by a directed self-assembly process, a hard mask layer is formed over the dielectric cap layer to fill spaces between the transfer layer portions. Spacers are then formed over a portion of the hard mask layer overlying a second portion of the substrate by a sidewall image transfer process. A top semiconductor layer of the substrate is subsequently patterned using the transfer layer portions and the spacers as an etch mask to provide densely packed semiconductor fins in the first region and semi-isolated semiconductor fins in the second region of the substrate.

主权项

1. A method of forming a semiconductor structure comprising:
forming a self-assembled structure comprising alternating first domains and second domains over a material stack that is located over a top semiconductor layer of a substrate, wherein the material stack comprises a transfer layer and a process layer overlying the transfer layer, and the self-assembled structure overlies a first region of the top semiconductor layer; removing the second domains of the self-assembled structure, leaving the first domains protruding from a top surface of the process layer; patterning the process layer and the transfer layer using the first domains as an etch mask to provide transfer layer portions over the top semiconductor layer; removing remaining portions of the process layer, leaving the transfer layer portions protruding from a top surface of the top semiconductor layer; forming a hard mask layer over the transfer layer portions and the top semiconductor layer, the hard mask layer filling spaces between the transfer layer portions; forming spacers on sidewalls of a plurality of mandrels located over the hard mask layer, the plurality of mandrels overlying a second region of the top semiconductor layer; removing the plurality of mandrels, leaving the spacers protruding from a top surface of the hard mask layer; patterning the hard mask layer using the spacers as an etch mask to provide hard mask layer portions; and patterning the top semiconductor layer using the transfer layer portions and the hard mask layer portions as an etch mask to provide a plurality of semiconductor fins.