发明名称 TIMING REGULATING CIRCUIT, DRIVE CIRCUIT, ELECTRO-OPTICAL DEVICE, AND ELECTRONIC APPARATUS
摘要 PURPOSE: To facilitate an estimate of a delay time between an input and an output in an electronic circuit for operating by using two phase signals of a positive logic signal and a negative logic signal obtained by inverting the positive logic signal. CONSTITUTION: Inverters INV1 and INV4 generate a reference signal R and a correction object signal H based on an input positive logic signal Pin and an input negative logic signal Nin. Since the reference signal R is transmitted via wirings Lp, a delay does not occur in its process. Meanwhile, the correction object signal H is affected by the signal R by a NAND circuit 11 and a NOR circuit 12, and its phase is corrected.
申请公布号 KR20040014355(A) 申请公布日期 2004.02.14
申请号 KR20030054929 申请日期 2003.08.08
申请人 SEIKO EPSON CORPORATION 发明人 FUJITA SHIN
分类号 G02F1/133;G02F1/136;G06F11/00;G09G3/20;G09G3/36;H03K5/00;H03K5/04;H03K5/151;H03L7/00;H04N5/66;(IPC1-7):G09G3/36 主分类号 G02F1/133
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