| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a fixed point computing element for logistic mapping for generating a code sequence of fully mixed 0 and 1 at a high speed by generating logistic mapping at a high speed. <P>SOLUTION: The computing element 10 calculating a fixed point at a prescribed bit length comprises a second value acquiring means 12 for finding a second value (X<SB>t</SB>'+1) which is a bit code of a prescribed bit length which is an inversion X<SB>t</SB>'of an input value X<SB>t</SB>+1 which is a bit code of the prescribed bit length; a multiplying means 13 multiplying the input value X<SB>t</SB>and the second value; and an initial input means 11 inputting to the second value acquiring means 12 as the input value X<SB>t</SB>by receiving input of an initial value X<SB>0</SB>which is a bit code of the prescribed length. In addition, in the case that a result obtained by the multiplying means 13 is regarded as the bit code of the bit length of two times of the prescribed bit length, input value input means 14 and 11 for acquiring the bit code of the prescribed bit length from a third bit and inputting it as the input value X<SB>t</SB>of the second value acquiring means 12 are provided. Furthermore, after the initial value X<SB>0</SB>is input, the mapping acquiring means 14 for sequentially acquiring a desired value from the result obtained by the multiplying means 13 is provided. <P>COPYRIGHT: (C)2004,JPO |
