发明名称 Apparatus and method for packet ingress interrupt moderation
摘要 A method and apparatus for moderating packet ingress interrupts. A network interface includes a packet timer and an absolute timer or absolute counter. The packet timer functions to minimize packet latency during periods of low packet ingress at the network interface. Each of the absolute timer and absolute counter functions to minimize CPU load and packet latency during periods of high packet ingress at the network interface.
申请公布号 US6868466(B2) 申请公布日期 2005.03.15
申请号 US20010967300 申请日期 2001.09.27
申请人 INTEL CORPORATION 发明人 CONNOR PATRICK L.
分类号 H04L12/56;(IPC1-7):G06F9/48;G06F13/24 主分类号 H04L12/56
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