发明名称 METHOD FOR FORMING INTERCONNECTIONS BETWEEN CIRCUIT LAYERS OF A MULTI-LAYER PACKAGE
摘要 Process for forming holes in an insulation layer for interconnecting conductors between conductive layers of a multi-layer circuit board in which photosensitive dielectric is placed between conductive foils to form a multi-layer assembly. The dielectric may be either the negative or positive type and is selectively exposed to radiant energy to produce soluble and insoluble portions. If negative, exposure occurs prior to adding both foils; if positive, exposure is after both foils are in place. Holes are formed in one or both foils corresponding to the location of the soluble portions of the dielectric or to the portions to be solubilized by exposure. Development then removes the soluble dielectric resulting in well formed holes for conductors.
申请公布号 US3778900(A) 申请公布日期 1973.12.18
申请号 USD3778900 申请日期 1970.09.04
申请人 IBM,US 发明人 HAINING F,US;PUTERBAUGH L,US
分类号 H05K3/00;H05K3/40;H05K3/42;H05K3/46;(IPC1-7):H01R43/00;C23F1/02 主分类号 H05K3/00
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