发明名称 System and method for manufacturing multiple light emitting diodes in parallel
摘要 System and method for manufacturing multiple light emitting diodes in parallel are disclosed. In one embodiment, the method includes providing an imaging writer system that includes a plurality of spatial light modulator (SLM) imaging units arranged in one or more parallel arrays, providing one or more substrates corresponding to multiple LEDs to be manufactured, receiving mask data to be written to the one or more substrates corresponding to the multiple LEDs, processing the mask data to form a plurality of partitioned mask data patterns corresponding to the plurality substrates of the multiple LEDs, assigning one or more SLM imaging units to handle each of the partitioned mask data pattern, and controlling the plurality of SLM imaging units to write the plurality of partitioned mask data patterns to the plurality substrates of the multiple LEDs in parallel.
申请公布号 US9507271(B1) 申请公布日期 2016.11.29
申请号 US201113225405 申请日期 2011.09.03
申请人 Applied Materials, Inc. 发明人 Chen Jang Fung;Laidig Thomas
分类号 G03B27/44;G03F7/20 主分类号 G03B27/44
代理机构 Silicon Valley Patent Group LLP 代理人 Silicon Valley Patent Group LLP ;Chan Thomas C.
主权项 1. A method for manufacturing multiple light emitting diodes (LEDs) in parallel, comprising: providing an imaging writer system, wherein the imaging writer system includes a plurality of spatial light modulator (SLM) imaging units arranged in one or more parallel arrays; providing a plurality of light emitting diode (LED) wafers to be manufactured; receiving mask data to be written to the plurality of LED wafers; processing the mask data to form a plurality of partitioned mask data patterns corresponding to the plurality of LED wafers, wherein processing the mask data to form the plurality of partitioned mask data patterns corresponding to the plurality of LED wafers comprises scaling the plurality of LED wafers from a first wafer size to a second wafer size, wherein the first wafer size is smaller than the second wafer size; assigning one or more SLM imaging units to handle each of the partitioned mask data pattern; and controlling the plurality of SLM imaging units to write the plurality of partitioned mask data patterns to the plurality of LED wafers in parallel, wherein the controlling the plurality of SLM imaging units comprises compensating for wafer warp caused by the scaling of the plurality of LED wafer from the first wafer size to the second wafer size.
地址 Santa Clara CA US