发明名称 APPARATUS HAVING PROCESSING PIPELINE WITH FIRST AND SECOND EXECUTION CIRCUITRY, AND METHOD
摘要 A processing pipeline may have first and second execution circuits having different performance or energy consumption characteristics. Instruction supply circuitry may support different instruction supply schemes with different energy consumption or performance characteristics. This can allow a further trade-off between performance and energy efficiency. Architectural state storage can be shared between the execute units to reduce the overhead of switching between the units. In a parallel execution mode, groups of instructions can be executed on both execute units in parallel.
申请公布号 US2016357561(A1) 申请公布日期 2016.12.08
申请号 US201615097377 申请日期 2016.04.13
申请人 ARM LIMITED 发明人 GREENHALGH Peter Richard;CRASKE Simon John;CAULFIELD Ian Michael;BATLEY Max John;SKILLMAN Allan John;PENTON Antony John
分类号 G06F9/30;G06F9/38;G06F12/08 主分类号 G06F9/30
代理机构 代理人
主权项 1. An apparatus comprising: a processing pipeline comprising: first and second execution circuitry to execute instructions, wherein the first and second execution circuitry have different performance or energy consumption characteristics; and instruction supply circuitry to supply instructions to the first and second execution circuitry, wherein the instruction supply circuitry supports first and second instruction supply schemes with different performance or energy consumption characteristics.
地址 Cambridge GB