System and method for test structure on a wafer

摘要

System and method for test structure on a wafer. According to an embodiment, the present invention provides a test structure for testing an integrated circuit. For example, the test structure and the integrated circuit are manufactured on a same substrate material and the testing being conducted is in a temperature-controlled environment. The test structure includes a top structure positioned above the integrated circuit, the top structure including a first metal material, which includes a first electrical terminal and a second electrical terminal. The test structure also includes a bottom structure positioned below the integrated circuit, the bottom structure including a first silicon material. A first side structure is positioned between the top structure and the bottom structure and located next to a first side of the integrated circuit. A second side structure is positioned between the top structure and the bottom structure and located next to a second side of the integrated circuit.

主权项

1. A test structure for testing an integrated circuit, wherein the test structure and the integrated circuit are manufactured on a same substrate material and the testing being conducted is in a temperature-controlled environment, the test structure comprising:
a top structure positioned above the integrated circuit, the top structure configured to generate heat and including a first metal material, the first metal material including a first electrical terminal and a second electrical terminal; a bottom structure positioned below the integrated circuit, the bottom structure including a first silicon material; a first side structure positioned between the top structure and the bottom structure and located next to a first side of the integrated circuit, the first side structure being characterized by a first height, the first side structure including a second metal material; a second side structure positioned between the top structure and the bottom structure and located next to a second side of the integrated circuit, the second side structure being characterized by a second height, the second side structure including a third metal material, wherein the top structure is not electrically connected to the first and second side structures.