| 摘要 |
<p>1397083 Coin testing MARS Inc 24 May 1972 [24 May 1971 23 Feb 1972] 16538/71 and 8385/72 Heading G4V A coin tester comprises means for subjecting a coin to electromagnetic fields of two different frequencies an indication of the acceptability of the coin only being produced when the interaction of the coin with each of the fields lies within predetermined tolerances. The lower frequency field, preferably in the range of 5-25 kHz, and the higher frequency field, preferably 200-800 kHz, are such that the former will penetrate deeply into or through all coins of an acceptable denomination whilst the latter will not penetrate more than halfway through the thickness of the thinnest coin to be tested. In a first embodiment, Figs. 3 and 4, for 5 c., 10 c. and 25 c. coins, four pot-core inductors 72, 74, 76 and 78 are located along a sidewall 40 of a coin shoot having an inclined coin support track 31. Each inductor is similar to a typical inductor (200) illustrated in Figs. 5 and 6 (not reproduced), having its pole face separated from the coin shoot by a thin layer of epoxy impregnated fibreglass, and forms part of the resonant circuit of a respective oscillator 80, 84, 86 and 88. The frequencies of the oscillators are altered by the passage of a coin past the associated inductor and narrow band detectors are provided for monitoring the frequency of each oscillator, the detector producing one output pulse for an acceptable coin and none or two pulses for an unacceptable coin. The LF oscillator 80 has two detectors 82, 81 tuned respectively for 5 c. coins, and both 10 c. and 25 c. coins, and the HF oscillators have detectors 85, 87 and 89 tuned for 10 c., 5 c. and 25 c. coins respectively. The outputs of the detectors are connected to associated flip-flops 91, 92, 94, 96 and 98 which are set by a first pulse from a detector and reset by a second, and the outputs of the flip-flops are connected to AND gates 101, 102 and 103. If a coin has satisfied both the LF and HF criteria for one of the denominations the associated AND gate will give an output when an interrogation pulse is applied via line 105, the outputs of the AND gates being connected to a totalizer 140 and via an AND gate 104 to a solenoid 110 which removes a blocking member 110 from a coin acceptance passageway 120. In an alternative form of LF circuit (Fig. 7, not shown) the coin sensitive inductor (525) is in one leg of a multiple leg bridge (520) having three parallel branch circuits each adjustable so that the inputs to one of differential amplifiers (537), (547) or (557) are balanced when a genuine coin of one particular denomination is adjacent inductor (525). Each differential amplifier is connected via a corresponding diode to a limiting amplifier which produces none, one or two pulses depending on the acceptability and denomination of a coin. In another embodiment (Fig. 9, not shown) a further HF inductor (711) is located upstream of the LF circuit, which in this case comprises series wound inductors (712), (713) located on opposite sides of the coin shoot. The oscillator (721) associated with inductor (711) is monitored by three detection circuits (751), (758) and (759) which respectively serve to indicate the arrival of a " test-worthy " coin, two coins in quick succession or a coin of unacceptably high conductivity and operate to enable or disenable the remainder of the best cycle accordingly. The circuitry of the HF and LF oscillators and detector circuits is shown in Figs. 10 and 11 (not reproduced). In the embodiment shown in Fig. 12 there are two HF inductors 1111 and 1114, located on different sides of the coin shoot, with the inductor 1114 which is of "E"-core form being located immediately above the LF inductors 1112, 1113. The oscillator 1121 associated with inductor 1111 is monitored by four detectors 1158, 1154, 1155 and 1156 the first of which is an arrival detector tuned to give two output pulses for any acceptable coin passing the inductor, the first of these pulses setting a flip-flop 1258. The Q output of flip-flop 1258 is applied to AND gates 1264, 1265 and 1266 enabling pulses from the other three detectors, each associated with a particular denomination to be applied to corresponding flip-flop 1254, 1255 and 1256. The oscillator 1124 of HF inductor 1114 is also monitored by three denomination associated detectors 1194, 1195 and 1196 and a departure detector 1157 similar to arrival detector 1158. The outputs of flip-flops 1254, 1255 and 1256, HF detectors 1194, 1195 and 1196 and LF detectors 1174, 1175 and 1176 are applied to particular ones of denomination associated AND gates 1294, 1295 and 1296 together with the Q outputs of flip-flops 1259 and 1277 which respectively indicate that the coin has left the first HF testing station and arrived at the second. The outputs of these AND gates are connected via respective flip-flops 1274, 1275, 1276 to AND gates 1234, 1235 and 1236 which are interrogated by a signal from flip-flop 1277 indicating that the coin has left the second test station. The outputs of the AND gates 1234, 1235 and 1236 are connected to a totalizer 1260 and via an OR gate 1237 and AND gate 1239 to a coin accept solenoid 1242. The other input of AND gate 1239 is from a photo-electric detector 1072 in the coin path above the coin accept gate. A signal from a detector 1073 below the coin gate serves to inhibit AND gate 1239, deactivating solenoid 1242, and is also applied to totalizer 1260 to cause it to accept the indication of denomination. In a further embodiment (Fig. 13, not shown) the LF and HF signals are superimposed and applied to a common inductor (1314) which forms part of a multiple leg bridge (1300). Two parallel branches of the bridge are provided for each denomination of coin to be tested, one branch being adjusted such that the bridge is balanced with respect to the LF component, and the other with respect to the HF component, when a genuine coin is adjacent the inductor (1314). A balance point detection circuit is provided for each branch of the bridge. In another embodiment (Fig. 8, not shown) the frequencies of the oscillators is determined by counting the number of cycles in a predetermined sampling period.</p> |
